Questions tagged [clflush]
10 questions
5
votes
2 answers
Is clflush or clflushopt atomic when system crash?
Commonly, cacheline is 64B but atomicity of non-volatile memory is 8B.
For example:
x[1]=100;
x[2]=100;
clflush(x);
x is cacheline aligned, and is initially set to 0.
System crashs in clflush();
Is it possible x[1]=0, x[2]=100 after reboot?

dangzzz
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2
votes
2 answers
Do I need to externally call flush if using cuda api to copy from GPU Memory to Persistent Memory?
I am using Cuda API:
cudaMemcpyAsync ( void* dst, const void* src, size_t count, cudaMemcpyKind kind, cudaStream_t stream = 0 )
to copy data from GPU memory from CPU memory. In case copying the data from CPU memory to Persistent Memory using…

Ashikee AbHi
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2
votes
1 answer
Is there any way to flush the cache line to the L3 cache?
I am a PhD student in the direction of architecture. I am doing some research work on cache.
Is there any way to flush the cache line to the L3 cache? For example, there are some cache lines in the L1 and L2 caches, and I want to adjust them to the…

Yujie
- 395
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2
votes
0 answers
Does x86 have a non-privileged instruction to flush an entire cache as opposed to a single line?
I am wondering if an instruction or sequence of instructions in x86 assembly exists to flush the entire L1I and L1D caches of the CPU executing the instruction. Specifically, I am looking for the non-privileged cache equivalent to the instruction…

ballsmahoney
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2
votes
1 answer
The right way to use function _mm_clflush to flush a large struct
I am starting to use functions like _mm_clflush, _mm_clflushopt, and _mm_clwb.
Say now as I have defined a struct name mystruct and its size is 256 Bytes. My cacheline size is 64 Bytes. Now I want to flush the cacheline that contains the mystruct…

Wentao Huang
- 23
- 5
2
votes
1 answer
Does clflush flush L1i?
This is the question: Does clflush flush L1i? Intel ISA manual was not clear on that:
Invalidates from every level of the cache hierarchy in the cache
coherence domain the cache line that contains the linear address
specified with the memory…

Some Name
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0
votes
0 answers
Some questions on _mm_clflush and _mm_clflushout
What are the major differences between _mm_clflush and _mm_clflushout ?
Is flushing the invalidate pages in the CPU cache is thread-safe, given that each thread flushes different memory regions (can be originated from different CPU cores)?
Just to…

user3563894
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0
votes
1 answer
Why cache hit takes more time than cache miss?
I want to clear my cache line in C or C++. My code is as follow and my gcc version is 9.3.0.
#include
#include
#include
#include
#include
void clear_cache(char *addr, int size) {
int…

Wentao Huang
- 23
- 5
0
votes
0 answers
How to get the address of the instruction in the shared library?
I want to reproduce some experiments in the flush-reload paper. In this experiment, there are two threads called A and B. There is a shared library c. The A thread flushes an instruction d in the shared library c from the cache through a flush…

Gerrie
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0
votes
1 answer
Evict cache line without clflush
I want to implement EVICT+RELOAD based on Yarom and Falkner's FLUSH+RELOAD attack but without using the clflush instruction to evict data from the caches.
I have a rough understanding of cache lines and pages, e.g., this post explains it concisely.…

Patrick
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