Questions tagged [mmx]

MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with their P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology"

MMX is a trademark used to reference an extension to the Intel Architecture Instruction set. Officially Intel states the initials are meaningless. This extension adds 57 opcodes, a 64-bit quadword datatype and eight 64-bit registers. These registers can be addressed using the names mm0 through mm7.

To avoid compatibility problems with the context switch mechanisms in existing operating systems, these registers were aliases for the existing x87 FPU stack registers. Unlike the FP stack, the MMn registers are directly addressable.

The main usage of the MMX instruction set is based on the concept of packed data types, which means that instead of using the whole register for a single 64-bit integer, two 32-bit integers, four 16-bit integers, or eight 8-bit integers may be processed concurrently. Thus, the unofficial initials are known as "MultiMedia eXtension" or "Matrix Math eXtension."

The mapping of the MMX registers onto the existing FPU registers made it somewhat difficult to work with floating point and SIMD data in the same application.

MMX provides only integer operations

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Are different mmx, sse and avx versions complementary or supersets of each other?

I'm thinking I should familiarize myself with x86 SIMD extensions. But before I even began I ran into trouble. I can't find a good overview on which of them are still relevant. The x86 architecture has accumulated a lot of math/multimedia extensions…
snoukkis
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difference between MMX and XMM register?

I'm currently learning assembly programming on Intel x86 processor. Could someone please explain to me, what is the difference between MMX and XMM register? I'm very confused in terms of what functions they serve and the difference and similarities…
Thor
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Common SIMD techniques

Where can I find information about common SIMD tricks? I have an instruction set and know, how to write non-tricky SIMD code, but I know, SIMD now is much more powerful. It can hold complex conditional branchless code. For example (ARMv6), the…
zxcat
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Concise SSE and MMX instruction reference with latencies and throughput

I am trying to optimize some arithmetic by using the MMX and SSE instruction sets with inline assembly. However, I have been unable to find good references for the timings and usages of these enhanced instruction sets. Could you please help me find…
Joe
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Is the PADDD instruction actually supported by MMX, even though it's missing from Intel's manual?

I wrote this code in NASM: PADDD mm0, mm1 And it was assembled with no errors, but this instruction, though it exists in NASM, I couldn't find it in Intel Instructions Manuals, all I found is this: PADDD xmm1, xmm2/m128 Which takes an xmm…
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Converting a C++ project to x64 with __m64 references

So when I started the conversion and set the target to 'x64', I get 7 unresolved externals. Two examples: error LNK2001: unresolved external symbol _m_empty ...CONVOLUTION_2D_USHORT.obj CONVOLUTION_2D_USHORT error LNK2001: unresolved external…
Robert Koernke
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How to set MMX registers in a Windows exception handler to emulate unsupported 3DNow! instructions

I'm trying to revive an old Win32 game that uses 3DNow! instruction set to make 3D rendering. On modern OSs like Win7 - Win10 instructions like FPADD or FPMUL are not allowed and the program throws an exception. Since the number of 3DNow!…
gho
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How to convert 'long long' (or __int64) to __m64

What is the proper way to convert an __int64 value to an __m64 value for use with SSE?
user541686
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SSE intrinsics: Convert 32-bit floats to UNSIGNED 8-bit integers

Using SSE intrinsics, I've gotten a vector of four 32-bit floats clamped to the range 0-255 and rounded to nearest integer. I'd now like to write those four out as bytes. There is an intrinsic _mm_cvtps_pi8 that will convert 32-bit to 8-bit signed…
Timothy Miller
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MMX intrinsics like _mm_cvtpd_pi32 not found with MSVC 2019 for 64bit targets; change from 2013?

I'm currently working on updating a large codebase from VS2013 to VS2019. One of the compiler errors I've run into is as follows: intrinsics.h(348): error C3861: '_mm_cvtpd_pi32': identifier not found This intrinsic function is defined in Visual…
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C/C++ usage of special CPU features

I am curious, do new compilers use some extra features built into new CPUs such as MMX SSE,3DNow! and so? I mean, in original 8086 there was even no FPU, so compiler that old cannot even use it, but new compilers can, since FPU is part of every…
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if/else statement in SSE intrinsics

I am trying to optimize a small piece of code with SSE intrinsics (I am a complete beginner on the topic), but I am a little stuck on the use of conditionals. My original code is: unsigned long c; unsigned long constant = 0x12345678; unsigned long…
drolex
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Why the compiler changes movq to movd when doing 64bit operations?

I am programming the following: __asm__ volatile ("movq %%rax, %%mm1\n" "movq %%rcx, %%mm2\n" : : "a" (0xDEADBEEFDEADBEEF), "c" (0xBADFACE5BADFACE5)); In this case, I am moving the value from rax to mm1 which…
mareiou
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Do the MMX registers always exist in modern processors?

When I look at diagrams and overviews of recent processors[1], I never see mention of the MMX registers MM0 - MM7. But from the specs, it seems like they still exist. Can one depend on them being present in all processors that support SSE? Do…
Nathan Kurz
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Is there a way to subtract packed unsigned doublewords, saturated, on x86, using MMX/SSE?

I've been looking at MMX/SSE and I am wondering. There are instructions for packed, saturated subtraction of unsigned bytes and words, but not doublewords. Is there a way of doing what I want, or if not, why is there none?
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