I'm new to Verilog and VHDL.
I have been studying Verilog focusing in how to do arithmetic operations, this is for a project that my professor has commended me to study. The idea is to perform a simple equation which content Addition, Subtraction, multiplication and division of REAL numbers such as 1.0058 + 0.1689
, in their binary version.
I'm reading a book of Arithmetic in Verilog by Cavanagh. They explain how to make adders, divisors, etc, they take a programming method by "Gates" they use the gates either in Combinational or Sequential Logic.
I understand the book easily, BUT isn't supposed that Verilog already have this +
,-
,*
and even /
for making divisions, why so much bothering to implement this with karnaugh and adder ripple carry adder etc, etc?
Why not just declare the variables and make begin...end and make the operations inside the statement with "="?