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I read about Static Hazard. We know Static 1-hazard is: Input change causes output to go from 1 to 0 to 1.

My note covers a Circuit as follows: enter image description here

My notes says: When B=C=D=1, for any changes in A values, it's probable to have Static Hazard 1.

But I think:

for 1 to 0 transition of A static hazard 1 can be observed. for 0 to

1 transition of A no hazard can be observed.

anyone could describe my sentence is correct or my note say the correct sentence. which of them is correct ? why? Thanks.

IRTFM
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1 Answers1

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If you reduce your circuit with the static values of B, C and D equal 1. You get a circuit that is symmetric for A and negated A.

F = not (A and not A)

So there is a probability of having a static 1 hazard for any change of A.

Edit: Answer to comment: If you write up your circuit as a function it will be:

F = not (not (A and B and D) and not (not A and not B) and not(not A and C))

If you insert you statically assigned values you get:

F = not (not (A and 1 and 1) and not (not A and not 1) and not(not A and 1))

Given that X and 1 = X and X and 0 = 0 we can reduce to:

F = not (not A and not (0) and not (not A))
F = not (not A and 1 and A)
F = not (not A and A)
Rasmus B. Sorensen
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  • How you reduce? is it possible say by diagram or equation? –  Feb 16 '16 at 16:30
  • There is an error. please see https://gist.github.com/pjbollinger/55e021b6f560fbedac10 to see we have Static-Hazard '1' when 'A' goes from 1 to 0 not when 0 goes to 1. okey? –  Mar 14 '16 at 12:54
  • @user4249446 you have an error in your code, you are not implementing the logic in the question. – Rasmus B. Sorensen Mar 14 '16 at 13:02
  • is it possible make it clearer for me or update my code? –  Mar 14 '16 at 13:09
  • @user4249446 can you elaborate on what you think is the error and what is unclear to you? – Rasmus B. Sorensen Mar 14 '16 at 13:11
  • main problem is that in any changes of A we have static hazard 1 or just 0 to 1 we have static hazard 1? –  Mar 14 '16 at 16:32
  • I am not sure I understand your comment, but there is a static hazard 1 for transitions of A from 0 to 1 and from 1 to 0. – Rasmus B. Sorensen Mar 14 '16 at 16:43
  • @user4249446 Your code implements `not A and not C` in the first nand gate instead of `not A and C` and the second nand gate implements `not A and B` instead of `not A and not B`. This error will not change the behavior of the static hazard. What is it that you code will prove? If you simulate this you will probably only see the hazard for one of the transitions of A. A hazard is an artifact of different physical delays through the circuit, this artifact will not show up in an event driven simulation like modelsim. – Rasmus B. Sorensen Mar 14 '16 at 18:45