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I've managed to get Chisel to use a hard memory macro with the correct usage of a SeqMem() instance, but they're for single port memories only.

Is there a way to get Chisel to infer a dual port memory macro?

Simon Kissane
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jbaxter
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    Assuming you're using the repl-seq-mems support. It appears to currently be limited to a single RW port or one R and one W port (https://github.com/freechipsproject/firrtl/issues/856). If you would like expanded support, please comment on that issue to add your voice! – Jack Koenig Aug 13 '18 at 18:35

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