Connect different port width

Question

Suppose my module has a 8-bit input and 8-bit output

module MyModule (input logic [7:0] in, output logic [7:0] out);
    ...
endmodule : MyModule

If I want to connect a 1-bit input in and leave the other bits as zero, the following works:

MyModule (.in({7'b0, a}), .out(b))

How can I do the same if I want a 1-bit output, ignoring the other bits? Something like this

MyModule (.in(a), .out({7'b0, b}))

vcs says its invalid, and connecting b directly gives a warning. I'd ideally like a solution that doesn't throw warnings.

Here's what I've thought of:

• Use .out(b) and use b[0] for bit
• Create unused logic variable unused and use .out({unused, b}) which does work
• Use assign statment (I'd like to avoid this)

Any solution better than these?

Answer 1

You could use the streaming operator:

MyModule M (.in(a), .out({<<{b}}));

But I think your first idea is the most straightforward.

Answer 2

You might also use parameterized modules:

module MyModule #(IN_WDT = 8, OUT_WDT = 8)
  (input logic[IN_WDT-1:0] in, output logic [OUT_WDT -1 : 0] out);

...

MyModule #(8,1) M1(a8, b1); 

or

MyModule #(.OUT_WDT(1)) M1(.in(a8), .out(b1));