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Questions tagged [mmu]

For programming the MMU hardware to implement paging or virtual addressing. Please give details of the MMU hardware. Use the tags 'paging' or 'virtual-memory' for use of an MMU as opposed to hardware programming.

Please provide some details of the particular MMU in questions.

The Memory Management Unit is the part of a processor responsible for translating virtual addresses to physical addresses. The MMU makes a number of features that are taken for granted on modern desktop OSes such as process separation and virtualization possible.

An MMU is often absent from deeply embedded systems and may not be used due to resource constraints as well as real time considerations. Some CPUs provide alternatives that allow a data cache to be used.Ref: ARM MPU

Related:

  • ; a cache of mmu table values.
  • - caches interact with the MMU depending on types (VIVT, PIPT, etc)
  • - issues related using the MMU to 'swap' memory to disk.
  • - issues with using virtual memory.
  • - some systems use the MMU to implement virtualization (especially without virtualization extensions in the CPU) and others MMUs provide assistance for the hypervisor.
262 questions
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Difference between logical addresses, and physical addresses?

I am reading Operating Systems Concept and I am on the 8th chapter! However I could use some clarification, or reassurance that my understanding is correct. Logical Addresses: Logical addresses are generated by the CPU, according to the book. What…
user427390
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How does kernel know, which pages in the virtual address space correspond to a swapped out physical page frame?

Consider the following situation: the kernel has exhausted the physical RAM and needs to swap out a page. It picks least recently used page frame and wants to swap its contents out to the disk and allocate that frame to another process. What…
Boris Burkov
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Why in x86-64 the virtual address are 4 bits shorter than physical (48 bits vs. 52 long)?

In the book "Low-Level Programming: C, Assembly, and Program Execution on Intel® 64 Architecture" I read: Each virtual 64-bit address (e.g., ones we are using in our programs) consists of several fields. The address itself is in fact only 48…
user1785721
25
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2 answers

understanding pmap output

I was trying to see memory map of a process on Linux x86-64 using pmap -x command. I got confused looking at the output of the pmap. Particularly for the entries for mapping dynamic libraries. There are multiple entries for them (actually 4 for all…
Arka
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Do multi-core CPUs share the MMU and page tables?

On a single core computer, one thread is executing at a time. On each context switch the scheduler checks if the new thread to schedule is in the same process than the previous one. If so, nothing needs to be done regarding the MMU (pages table). In…
Manuel Selva
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Page table in Linux kernel space during boot

I feel confuse in page table management in Linux kernel ? In Linux kernel space, before page table is turned on. Kernel will run in virtual memory with 1-1 mapping mechanism. After page table is turned on, then kernel has consult page tables to…
Thang Le
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Linux /proc/pid/smaps proportional swap (like Pss but for swap)

It seems (from looking at the Linux kernel source) that the Swap: metric in /proc/pid/smaps is the total swap accessible by the given pid. In the case where there is shared memory involved, this seems to be an over-approximation of actual swap…
Giovanni Funchal
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Using MMU to implement resizable arrays

Usually, lists are implemented either as linked lists, which are slow to traverse, or as array lists, which are slow when inserting elements. I was wondering if it would be possible to use the processor's MMU to implement lists more efficiently, by…
d9584
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Measuring TLB miss handling cost in x86-64

I want to estimate the performance overhead due to TLB misses on a x86-64 (Intel Nehalem) machine running Linux. I wish to get this estimate by using some performance counters. Does anybody has some pointers on what is the best way to estimate…
Arka
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Multiple hugepage sizes in Linux (x86-64)?

Does the Linux on x86-64 support multiple huge page sizes (e.g., both 2MB and 1GB page sizes beyond the 4KB base page size)? If yes, is there a way to specify that for a given allocation which huge page size to use? In other words, my question is if…
Arka
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Linux Page Table Management and MMU

I have a question about relationship between linux kernel and MMU. I now got a point that the linux kernel manages page table between virtual memory addresses and physical memory addresses. At the same time there is MMU in x86 architecture which…
John Doyle
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Does a hyper-threaded core share MMU and TLB?

To my knowledge, both MMU and TLB are not shared in a hyper-threaded core in Intel x86_64. However, then, if two threads that don't share the address space are scheduled to the same physical core, how do they run? I think, in that case, the threads…
Jonggyu Park
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How to debug an aarch64 translation fault?

I am writing a simple kernel in armv8 (aarch64). MMU config: 48 VA bits (T1SZ=64-48=16) 4K page size All physical RAM flat mapped into kernel virtual memory (on TTBR1_EL1) (MMU is active with TTBR0_EL1=0, so I'm only using addresses in 0xffff< addr…
maxbc
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Difference between MMU and memory controller

What is the role of memory controllers and how are they different from the MMU inside the processor? is it that the MMU job is to translate virtual addresses to physical ones (among other things) and send this physical address to the memory…
Keeto
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How do Operating Systems prevent programs from accessing memory?

My understanding currently is, I can write an operating system in C I can write a program for that operating system in C When I write an operating system I can see all of the memory When I write a program the operating system hides memory from…
Tyler
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