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I want to call questa sim commands like add wave ,add list, write list from my SystemVerilog test bench

task add_files_to_list();
add wave -position insertpoint  sim:/top/clk

add list sim:/top/clk 

write list -window .main_pane.list.interior.cs.body /home/simulation/top/example.lst

endtask

but the above doesn't work when i do from system verilog, i have to do i manually from tool. is there any way to do it. or can i call a tcl script from my system verilog code.

Thanks

dave_59
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user3627129
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1 Answers1

3
 mti_fli::mti_Cmd("command")

See /examples/systemverilog/dpi/cpackages/test.sv

dave_59
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  • can i call tcl file from system verilog ? – user3627129 Jun 20 '16 at 15:47
  • @Paebbels Please do. – dave_59 Jun 20 '16 at 21:18
  • @dave_59 Here is the question: http://stackoverflow.com/questions/37933083/why-should-an-hdl-simulation-from-source-code-have-access-to-the-simulators-a – Paebbels Jun 20 '16 at 22:55
  • @user3627129 I think we are using script file for that commands, like run.sh which contain all that commands OP listed in *add_files_to_list*, to make testbench irrespective of tool, people mostly refer scripts instead of commands in code it self. – Prakash Darji Jun 21 '16 at 03:41