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I have a Lattice ICE40_8K breakout board and would like to know how to setup a pin pair as LVDS mode inputs.

If setting up as normal single pins is done thus: 

SB_IO #(.PIN_TYPE(6'b0000_00)) _io (
        .PACKAGE_PIN(pin),
        .INPUT_CLK(clk),
        .D_IN_0(rd));

How do I modify that to be LVDS input pin, and how is the additional pin allocated.

Thanks

EDIT:

Would it be something like?:

  SB_IO #(.PIN_TYPE(6'b0000_00), .IO_STANDARD("SB_LVDS_INPUT")) _io (
        .PACKAGE_PIN(pin),
        .INPUT_CLK(clk),
        .D_IN_0(rd));

I understand the LVDS inputs are only in Bank 3, can anyone point me to what the pin list is for bank 3, so I can choose one ...

Thanks

Bernard Mentink
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1 Answers1

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Lattice TN1253 explains how to use LVDS inputs. There are Verilog code examples starting at page 15. The same Verilog code should also work with Project IceStorm.

CliffordVienna
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  • Thanks, I had seen that. I just want to be sure the Yosys tools do the same thing with the pins. I.e if I select input pin C1 will the tools automatically select C2 for me as the other differential input pin? (or vice-versa) – Bernard Mentink Oct 18 '16 at 20:06
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    @BernardMentink Yes. The same Verilog code should work with the Lattice iCEcube tools and Project Icestorm. (However, the handling of differential pairs as you described it is done by arachne-pnr, not Yosys. Yosys just passes the `IO_STANDARD` to arachne-pnr, arachne-pnr does the rest.) – CliffordVienna Oct 19 '16 at 11:26