How to pass an array type as generic type parameter to a VHDL package?

Question

I'm working on a generic package (list) in VHDL-2008. This package has a type generic for the element type. If I declare an array type of this element type within the package, it's a new type. So for e.g. integer, my new integer_array would be incompatible with integer_vector from library ieee.

So I need also to pass in the array type (e.g. integer_vector). When an array instance of that array type is used with a 'range attribute, it gives me a warning in QuestaSim:

Prefix of attribute "range" must be appropriate for an array object or must denote an array subtype.

How do a denote that a generic type parameter is an array?

Generic Package:

package SortListGenericPkg is
  generic (
    type ElementType;  -- e.g. integer
    type ArrayofElementType;  -- e.g. integer_vector
    function LessThan(L : ElementType; R : ElementType) return boolean;     -- e.g. "<"
    function LessEqual(L : ElementType; R : ElementType) return boolean     -- e.g. "<="
  );

  function inside (constant E : ElementType; constant A : in ArrayofElementType) return boolean;
end package;

package body SortListGenericPkg is
  function inside (constant E : ElementType; constant A : in ArrayofElementType) return boolean is
  begin
    for i in A'range loop  -- this line causes the error
      if E = A(i) then
        return TRUE ;
      end if ;
    end loop ;
    return FALSE ;
  end function inside ;
end package body;

Instantiation:

package SortListPkg is
  package SortListPkg_int is new work.SortListGenericPkg
    generic map (
      ElementType        => integer,
      ArrayofElementType => integer_vector,
      LessThan           => "<",
      LessEqual          => "<="
    );
  alias Integer_SortList is SortListPkg_int.SortListPType;
end package SortListPkg ;

IEEE Std 1076-2008 16.2.3 Predefined attributes of arrays, A'RANGE, Prefix: *Any prefix A that is appropriate for an array object, or an alias thereof, or that denotes an array subtype whose index ranges are defined by a constraint.* ArrayofElementType class and subtype are not known until after elaboration. 6.5.3 Interface type declarations *The set of values and applicable operations for an interface type may be determined by an associated subtype in the environment.*, *...an undefined base type and a subtype of the base type. The class (see 5.1) of the base type is not defined.* — , Nov 15 '16 at 03:02

score 1 · Accepted Answer · answered Nov 14 '16 at 19:54

1

ModelSim makes a similar error/warning, so it's maybe a VHDL standard issues.

A workaround is to declare ArrayofElementType as part of the package, like:

package SortListGenericPkg is
  generic (
    type ElementType  -- e.g. integer
  );
  type ArrayofElementType is array (integer range <>) of ElementType;
  function inside(constant E : ElementType; constant A : in ArrayofElementType) return boolean;
end package;

and then convert the argument when inside is called, like:

... inside(int, ArrayofElementType(int_vec));

or simple use ArrayofElementType as type when declaring the argument if possible/feasible.

answered Nov 14 '16 at 19:54

Morten Zilmer

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Can I convert both array? Aren't they considered different incompatible types? How can I do the reverse conversion? – Paebbels Nov 14 '16 at 22:45
QuestaSim shows this error: `** Error: (vcom-1583) Illegal type converson from 'work.SortListGenericPkg.ArrayofElementType' to 'work.SortListGenericPkg.ArrayofElementType_Internal' (non-numeric to array).` The first parameter isn't known to be an array. **Edit:** oh it's on the caller side ... – Paebbels Nov 14 '16 at 23:01
As far as I can tell it works. But at least we noticed - while discussing the issue in the new [VHDL Gitter channel](https://gitter.im/vhdl/General) - that VHDL needs a concept to specify the kind of a type parameter in package generic lists. – Paebbels Nov 15 '16 at 01:03
Conversion in both directions are possible, since both types are available. I read briefly through the VHDL Gitter channel. Maybe implicit type conversion to destination type could be an alternative. – Morten Zilmer Nov 15 '16 at 07:16

How to pass an array type as generic type parameter to a VHDL package?

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