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Why has the following clock generation statement not 100% code coverage in ModelSim/QuestaSim?

clk <= not clk after 5 ns when not finished;

This is the full example:

library ieee;
use     ieee.std_logic_1164.all;

entity coverage1_tb is
end entity;

architecture tb of coverage1_tb is
  signal clk      : std_logic := '1';
  signal finished : boolean   := false;
begin  -- architecture tb
  clk <= not clk after 10 ns when not finished;
  --clk <= not clk after 10 ns when not finished else unaffected;

  process
  begin
    wait until rising_edge(clk);
    wait until rising_edge(clk);

    wait until rising_edge(clk);
    finished <= true;
    wait;
  end process;
end architecture;

If I add this else branch: else unaffected, then I get 100% coverage.

Concurrent signal assignment are translated into processes with sequential signal assignments (LRM 11.6). A unaffected branch is translated into a null statement (LRM 11.6, Note 2; LRM 10.5.2.1).

I'm not sure why ModelSim/QuestaSim demands me to write an explicit else branch, which contains no waveform.

marc_s
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Paebbels
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2 Answers2

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Not quite an answer but I can report that ghdl built with the gcc backend reports 100% coverage for this example.

ghdl -a --std=08 -g -fprofile-arcs -ftest-coverage coverage1_tb.vhd
ghdl -e --std=08 -Wl,-lgcov -Wl,--coverage coverage1_tb
./coverage1_tb 
lcov --capture --directory . 
genhtml coverage.info --output-directory html

produces the following HTML report enter image description here

So, this may be a question for Modelsim technical support.

Branch coverage via gcc/ghdl/gcov is not so satisfactory : some of VHDL's more advanced constructs like signal assignments involve branches internally, and gcc doesn't distinguish between these and actual branches in VHDL code. So branch coverage works but with a lot of clutter. (Ironically, exceptions in C++, profiled using g++/gcov, appear to suffer the same clutter problem).

  • Thanks Brian, what is needed to run `lcov` and `genhtml` on Linux (Debian Testing?) It looks like I could easily integrate coverage statistics into our [PoC-Library](https://github.com/VLSI-EDA/PoC). – Paebbels Feb 07 '17 at 00:23
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    as far as I can remember, `apt-get install lcov` - genhtml is part of the package. But see caveats on other Q/A, it looks as if neither simulator is completely smooth at code coverage. –  Feb 07 '17 at 00:44
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Which code coverage type do you mean? Simple statement coverage, or branch or toggle coverage? For all of these 3 types I get full coverage of the clock generation statement. Maybe it's an issue with an older Modelsim/Questa version you use? I use Modelsim DE 10.6 (Revision 2016.12).

My tcl commands are:

vcom -2008 +cover coverage1.vhdl
vsim -novopt -coverage coverage1_tb
run -all
tmeissner
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