Vivado, Zynq, BRAM Controller, Narrow AXI burst option

Question

Consider a simple system with PS (Processor system) with enabled AXI3 Master, connected to AXI4 Interconnect connected to BRAM Controller that has access to BRAM memory.

What is the meaning of AXI Narrow Bursts? How do i define or consider what is narrow burst? Can i control whether I want a narrow burst or not?

score 1 · Accepted Answer · answered Jan 05 '19 at 18:46

1

Narrow burst allows transfer of data smaller than the data bus width. The main use use to allow slave devices of differing bus widths, or requests of a smaller width, to to communicate with the master.

Please see AXI4 (Lite) Narrow Burst vs. Unaligned Burst Clarification/Compatibility The accepted answer gives a good description.

answered Jan 05 '19 at 18:46

Here is another related question with a bounty: [AXI Protocol, difference between secure and non-secure transactions](https://stackoverflow.com/questions/53931678/axi-protocol-difference-between-secure-and-non-secure-transactions) maybe you have an answer here too. – Paebbels Jan 05 '19 at 19:11
@Strom thank you. It makes a lot of sense. And also for answering the other question. – CJC Jan 07 '19 at 14:24
@Paebbels thank you for tracking these questions and getting the other question answered as well – CJC Jan 07 '19 at 14:24

Vivado, Zynq, BRAM Controller, Narrow AXI burst option

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