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I need to implement a watchdog timer on my Cyclone II FPGA board. I have designed the system using QSYS, i need to know what are the next steps to implement and test a watchdog Timer.

totokaka
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wi95
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  • Welcome to Stack Overflow! Your question seems a bit broad. To get good answers you should consider if you can make it more specific in any way. If you find the answer yourself, rmember to [answer your own question](https://stackoverflow.com/help/self-answer). – totokaka Dec 29 '18 at 10:23
  • You can start with telling us what *"the system"* is. – Oldfart Dec 29 '18 at 21:37

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To implement a watchdog with qsys you can use the "Interval Timer" in library : "Processors and Peripherals" -> "Peripherals" -> "Interval Timer". Then configure it as a watchdog.

For testing it, it depend to your application. We need more information on your project architecture.

FabienM
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