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Questions tagged [altivec]

AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple, IBM and Freescale Semiconductor, formerly the Semiconductor Products Sector of Motorola, (the AIM alliance), and implemented on versions of the PowerPC including Motorola's G4, IBM's G5 and POWER6 processors, and P.A. Semi's PWRficient PA6T.

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What makes Apple's PowerPC memcpy so fast?

I've written several copy functions in search of a good memory strategy on PowerPC. Using the Altivec or fp registers with cache hints (dcb*) doubles the performance over a simple byte copy loop for large data. Initially pleased with that, I threw…
user242091
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efficient way to convert scatter indices into gather indices?

I'm trying to write a stream compaction (take an array and get rid of empty elements) with SIMD intrinsics. Each iteration of the loop processes 8 elements at a time (SIMD width). With SSE intrinsics, I can do this fairly efficiently with…
Yale Zhang
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Error: operand out of range (64 is not between 0 and 31)

I'm suffering GCC inline assembly on PowerPC. The program compiles fine with -g2 -O3, but fails to compile with -g3 -O0. The problem is, I need to observe it under the debugger so I need symbols without optimizations. Here is the program: $ cat…
jww
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Is vec_sld endian sensitive?

I'm working on a PowerPC machine with in-core crypto. I'm having trouble porting AES key expansion from big endian to little endian using built-ins. Big endian works, but little endian does not. The algorithm below is the snippet presented in an IBM…
jww
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How to obtain a VSX value of zero?

We permute a vector in a few places, and we need the distinguished 0 value to use with the vec_perm built-in. We have not been able to locate a vec_zero() or similar, so we would like to know how we should handle things. The code currently use two…
jww
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How to store a vector to an unaligned location in memory with Altivec

I know from tutorial that unaligned loading and storing it can look like: //Load a vector from an unaligned location in memory __vector unsigned char LoadUnaligned(const unsigned char * src ) { __vector unsigned char permuteVector = vec_lvsl(0,…
Georg
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Why doesn't the compiler fold xxswapd and vperm?

I've still trying to get my 1 to 2 cpb out of Power8's SHA instructions. This C/C++ code copies the user's message into the message schedule: void SHA256_SCHEDULE(uint32_t W[64+2], const uint8_t* D) { uint32_t* w =…
jww
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Check that at least 1 element is true in each of multiple vectors of compare results - horizontal OR then AND

I'm looking for an SSE Bitwise OR between components of same vector. (Editor's note: this is potentially an X-Y problem, see below for the real comparison logic.) I am porting some SIMD logic from SPU intrinsics. It has an…
Michael IV
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What is the availability of 'vector long long'?

I'm testing on an old PowerMac G5, which is a Power4 machine. The build is failing: $ make ... g++ -DNDEBUG -g2 -O3 -mcpu=power4 -maltivec -c ppc-simd.cpp ppc-crypto.h:36: error: use of 'long long' in AltiVec types is invalid make: *** [ppc-simd.o]…
jww
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Porting MMX/SSE instructions to AltiVec

Let me preface this with.. I have extremely limited experience with ASM, and even less with SIMD. But it happens that I have the following MMX/SSE optimised code, that I would like to port across to AltiVec instructions for use on PPC/Cell…
Tim Kane
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Eclipse CDT Editor support for altivec C++ extensions?

Does the Eclipse CDT C++ editor have a means of supporting the Altivec C++ language extensions, as implemented for example in the GNU g++ compilers when compiling with -maltivec? Specifically, can it be made to stop reporting the vector data types…
grrussel
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Double-word vector rotates on old Altivec's without 64-bit data type

This is related to Power4 and lack of vector long long. On Power7 and Power8 we can perform: typedef __vector unsigned long long uint64x2_p; ... uint64x2_p val = {...}; uint64x2_p res = vec_rl(val, val, bits); I need to find a workaround for the…
jww
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Does IBM XL/C signal Altivec support in the preprocessor?

I'm trying to determine when to activate some Altivec code paths. When I examine preprocessor macros when -qaltivec is in effect I don't see a corresponding preprocessor macro (see below). Our worry or fear is the need for -qaltivec and -DALTIVEC=1…
jww
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How to check msr.le at runtime using built-ins?

This question came up in a Power8 in-core crypto patch. The patch provides AES using Power8 built-ins. When loading a VSX register we need to perform a 128-bit endian reversal when running on a little-endian machine to ensure the VSX register loads…
jww
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xlC and Operation between types "vector unsigned int" and "int" is not allowed

I'm trying to compile a source file on PPC64-LE. I'm using the xlC compiler and the compile is failing. GCC accepts the program, so I'm not really sure what the cause of the problems are. Here's the command line: $ xlc test-p8.c -qarch=pwr8…
jww
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