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Questions tagged [harvard-architecture]

21 questions
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6 answers

Issue with NULL pointers on Harvard Architecture platform

Interesting issue we came across here this week. We are working in C on a Harvard Architecture embedded platform, which has 16-bit data addresses and 32-bit code addresses. The issue occurs when you are working with function pointers. If you have…
Vicky
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Are Harvard architecture computers immune to arbitrary code injection and execution attacks?

Harvard architecture computers have separate code and data memories. Does this make them immune to code injection attacks (as data cannot be executed as code)?
Matthew Murdoch
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von neumann vs harvard architecture

Why computer architecture based on von Neumann architecture is preferred over Harvard architecture, when designing personal computers; while Harvard architecture is used for designing microcomputer based computer systems and DSP based computer…
SouvikMaji
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How to make two otherwise identical pointer types incompatible

On certain architectures it may be necessary to have different pointer types for otherwise identical objects. Particularly for a Harvard architecture CPU, you may need something like: uint8_t const ram* data1; uint8_t const rom* data2; Particularly…
Jubatian
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How can I tell whether my computer is Harvard or von Neumann architecture?

I am using laptop with below configuration. Processor: Intel(R) Core(TM)i5-4300U CPU @1.90GHz 2.49GHz RAM: 8GB System Type:64-bit OS, x64-based processor Windows Edition:Windows 8.2 Enterprise When I was reading about CPU architectures, i wanted to…
Deepa Bedsur
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Is the Raspberry Pi based on Harvard Architecture?

I was under the impression that the Raspberry Pi's ARM processor, although having an armhf microarchitecture, still followed the Von Neumann architecture (principally sharing main memory for instructions and data). However I came across this single…
Luke Moll
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booting linux on harvard architecture

I was working on pandaboard, when this problem occurred to me. pandaboard uses OMAP 4430, a harvard based architecture. The board has 1GB memory (DDR2 ram). But a harvard architecture requires two memories right ? Here is what I understand the…
Anay
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configuring the overlapping address for code and data in linker script

I am newbie to linker script. In my design, RISCV has the code space and data space seperately. The code address is 0~0xFFFF, the data address is 0~0xFFFFFF. Here is my linker scprit: MEMORY { CODE (rx) : ORIGIN = 0x0000, LENGTH = 0x10000 DATA…
hyperion007
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Initialising global variables in C in Harvard CPU

I build a 32-bit RISC-V CPU with Harvard architecture and I want to write programs for it in C. I have a RISC-V compiler set (https://xpack.github.io/riscv-none-embed-gcc/) that can do just that and works fine - for most things. The problem starts…
Filip
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Any advantages of von Neumann architecture?

I searched the difference between von Neumann and Harvard architecture and came to conclusion, that comparing to Harward architecture von Neumann has no positive sides, only negative such as "bottleneck" and vulnerability. So why most computers use…
alexb
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Aren't the von Neumann model and the Turing model practically the the same thing?

From my understanding, the Turing model is made up of I/O data, a CPU, and a "program". The "program" is used to configure how the CPU will handle the input data in order to produce the output data. If we change the program, then the CPU will handle…
pctopgs
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Does the Harvard architecture have the von Neumann bottleneck?

From the naming and this article I feel the answer is no, but I don't understand why. The bottleneck is how fast you can fetch data from memory. Whether you can fetch instruction at the same time doesn't seem to matter. Don't you still have to wait…
tcya
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How would I take a simple program to multiply two numbers in MARIE assembly and rewrite it in a language readable for a one address VM

I am tasked with writing code for a VM written in the C language. It can read in a file and perform operations based on the file input. From the example I've been given, it seems the first number of each instruction pertains to a command (1 - load,…
spookikitti
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In the Harvard Architecture, are there two MAR's and MBR/MDR's?

This might be super basic but I didn't find any Info on this; if in Harvard Architecture Data and Instructions need to be accessed at the same time, does this require the CPU to have two distinct MAR's that point to their respective addresses and…
Beo
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How is inline assembly possible on AVR 8-bit?

I know this fits close to the "stupid-question" category, but I've been researching how to execute machine code after bootloading on AVR 8-bit and have come to an understanding that the Harvard Architecture that is used on the AVR 8-bit MCUs makes…
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