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Questions tagged [alu]

ALU stands for Arithmetic Logic Unit, that performs arithmetic and logical operations for computer systems.

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How do I set output flags for ALU in "Nand to Tetris" course?

Although I tagged this homework, it is actually for a course which I am doing on my own for free. Anyway, the course is called "From Nand to Tetris" and I'm hoping someone here has seen or taken the course so I can get some help. I am at the stage…
MahlerFive
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How are shifts implemented on the hardware level?

How are bit shifts implemented at the hardware level when the number to shift by is unknown? I can't imagine that there would be a separate circuit for each number you can shift by (that would 64 shift circuits on a 64-bit machine), nor can I…
Matt
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How many ALUs are in a CPU?

I believe that there is "1" ALU per core in a CPU correct? I seem to be having a little bit of difficulty looking this up. Someone asked me in a discussion for school so I am quite curious as well.
Duffman
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Why are denormal floating-point values slower to handle?

It is generally the case that floating-point values that consume or produce denormals, are slower than otherwise, sometimes much slower. Why is this the case? If it's because they trap to software instead of being handled directly in hardware, as is…
rwallace
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How does the CPU do subtraction?

I have some basic doubts, but every time I sit to try my hands at interview questions, these questions and my doubts pop up. Say A = 5, B = -2. Assuming that A and B are 4-bytes, how does the CPU do the A + B addition? I understand that A will have…
xyz
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Memory Hierarchy - Why are registers expensive?

I understand that: Faster access time > More expensive Slower access time > Less expensive I also understand that registers are the top of the hierarchy, and have the fastest access time. What I am having a hard time researching is why it's so…
ajdbnabad13
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RISCV: how the branch intstructions are calculated?

I am trying to understand how modern CPU works. I am focused on RISC-V. there are a few types of branches: BEQ BNE BLT BGE BLTU BGEU I use a venus simulator to test this and also I am trying to simulate it as well and so far so good it works, but…
Kralik_011
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VPU vs FPU vs GPU vs ALU

I want to better understand the difference between Vector Processing Graphics (VPU), Floating Point Unit, Graphics Processing Unit and Arithmetic and Logic Unit. I understand that inside a CPU there's a FPU and a ALU, but is that also true for…
testin3r
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Understanding the difference between overflow and carry flags

I am designing a 16 bit ALU in verilog based on an existing RISC ISA. The ISA says that the carry flag is set when the operation is unsigned, and overflow is set when the operation is signed. The interesting thing is that the ISA implements ADD and…
richbai90
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Why does AVX512-IFMA support only 52-bit ints?

From the value we can infer that it uses the same components as double-precision floating-point hardware. But double has 53 bits of significand, so why is AVX512-IFMA limited to 52 bits? Sure the mantissa has only 52 bits and one bit is hidden, but…
phuclv
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How does the arithmetic logic unit actually works?

In other words, how can energy combined with metal perform logic operations? In the research I've done i'ts always assumed how the 'magic' happens but usually there's a lack of explanation on how can a physical device can 'understand' and perform…
Mikael Blomkvist
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How modern X86 processors actually compute multiplications?

I was watching some lecture on algorithms, and the professor used multiplication as an example of how naive algorithms can be improved... It made me realize that multiplication is not that obvious, although when I am coding I just consider it a…
speeder
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ALU NOOP case infers a latch: Is this OK?

I'm designing an ALU in Verilog with a combinational always block and cases for every opcode. In the case of NOOP, nothing should happen, so I'm just setting result = result. I understand why this infers a latch. My question is: is there a better…
richbai90
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Binary addition carrying from left to right

How would you efficiently implement 64 bit binary addition carrying from left to right? Like flipping the bits then adding: 0101 + 1110 = BitReverse(1010 + 0111) = BitReverse(10001) = 10001 My current solution is to reverse…
me'
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ALU in Verilog: "Unable to bind wire/reg/memory"

I am trying to make a simple 32 bit ALU with an overflow flag, and then output the inputs and results of the ALU to the screen, but I encountered some problems with connecting the elements for the test bench. I got this error: test_32bALU.v:15:…
Tina
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