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Questions tagged [lfsr]

From Wikipedia: "In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state."

For more information see: https://en.wikipedia.org/wiki/Linear-feedback_shift_register

43 questions
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Efficient bit-fiddling in a LFSR implementation

Although I have a good LSFR C implementation I thought I'd try the same in Haskell - just to see how it goes. What I came up with, so far, is two orders of magnitude slower than the C implementation, which begs the question: How can the performance…
mcmayer
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Berlekamp-Massey minimal LFSR issues

I am having some issues getting the correct LFSR for my sequence(pattern), when I implement it as LFSR and the corresponding taps, it doesn't generate the sequence, any suggestions? The goal patt is {1, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1}; My code…
Leo
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C function to Python (different results)

I am trying to port this snippet of code to python from C. The outputs are different even though it's the same code. This is the C version of the code which works: int main(void) { uint8_t pac[] = {0x033,0x55,0x22,0x65,0x76}; uint8_t len =…
Dimo
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How to inverse LFSR and shift register in C?

I'm programming an OFDM system, both the transmitter and receiver sides. The first function where the bits go is the scrambler, which is basically an LFSR, where my polynomial is x^7 + x^4 + 1, simply, I XOR the 7th and 4th bit in the register, and…
typos
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How to generate a repeating integer sequence from 0 to n?

I'm trying to write some code that will create a pseudo-random integer sequence that uses every digit from 0 to n, and then repeats. The naive approach would be to create an array of n integers, and then scramble them somehow, then loop through them…
Aurelius
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Pseudo-randomly selecting and generating a permutation in O(1) space

I have a piece of code where I have to look in a bunch of vectors for the first element which satisfies a given predicate. I have to do this multiple times, and as there are multiple elements which satisfy my predicate, I'd like to somewhat…
Svalorzen
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Writing to an unformatted, direct access binary file in C

I'm trying to use this diehard repo to test a stream of numbers for randomness (https://github.com/reubenhwk/diehard). It gives these specifics for the file type it reads: Then the command diehard will prompt for the name of the…
Davigor
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How exactly were all the round constants for SHA-3 generated?

I can't seem to obtain the exact algorithm that would generate all the round constants for SHA-3. The description can be found here: crypto.stackexchange.com/questions/6444. These values can be found at…
lyrically wicked
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Bitwise calculation of an LFSR sequence using CRC-style notation

My question stems from the observation made that we can use a Linear Feedback Shift Register to perform a CRC check. Algebraically this normally is of the form; S(x) = M(x) * x^k % G(x) ( gives the remainder, for a G(x) of order k) The…
davidhood2
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What would be a good way to generate 16 bit random numbers in Visual C++?

I'm trying to create a long (= 2^31) list of 32 and 16 bit random numbers. For 32 bits, I'm using lfsr113_Bits() from implementation of rand() , but I'm not sure what would be the best way to get a quality sequence of 16 bit numbers. Unfortunately,…
JSz
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Purpose of REFIN and REFOUT parameters in CRC Rocksoft model

The Rocksoft parameter model for CRCs is well known. It contains two boolean parameters called REFIN and REFOUT. I understand what they are doing and I understand how to implement them. There are a lot of information in the web about the Rocksoft…
Silicomancer
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How do I build a 5-bit maximal-length Galois LFSR in Verilog?

I'm having a problem with getting the desired output. Here is my code: module top_module( input clk, input reset, // Active-high synchronous reset to 5'h1 output reg [4:0] q ); wire din3; assign din3 = q[3] ^ q[0]; …
Timothy Calvert
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ERROR stray \327 C code not compiling

This c code from a book on applied cryptography will not compile int LFSR () { static unsigned long ShiftRegister = 1; /* Anything but 0. */ ShiftRegister = ((((ShiftRegister >> 31) ^ (ShiftRegister >> 6) ^ (ShiftRegister >> 4) ^…
Rafael Santana
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LFSR doesn't generate random values during simulation

I am new to VHDL, but have some idea. I made this LFSR but don't know why it is stuck between the initial seed value and the other XOR value. I am working with Altera Quartus 16 Lite and ISim. library ieee; use ieee.std_logic_1164.all; --creating…
hrsd
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Linear Feedback Shift Register explaination

I want to obfuscate a string using Linear Feedback Shift Register, so I am trying to understand the below code of wiki In the below wiki example of Linear Feedback Shift Register ,'0xACE1u' is the hex value used as start state, But I didnt…
Ravi Kiran
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